Forward Error Correction Intern

marvell · Cordoba

New

Junior 🇬🇧 English

Python Verilog SystemVerilog

Job description

About the role

Marvell Argentina is seeking a motivated intern to join the team designing forward error correction (FEC) and DSP schemes for optical coherent transceivers. You will work on cutting‑edge FEC/DSP algorithms, digital implementation architectures, and simulation software.

Key responsibilities

Design and validate optical‑communication‑oriented DSP/FEC algorithms.
Develop digital implementation architectures for ASIC hardware.
Write simulation software for communication system testing.

Required profile

Currently pursuing a BS, MS, or PhD in Electronics, Computing, or Telecommunications.
Curious, self‑motivated, eager to learn and work in a team environment.

Required skills

Knowledge of digital communication systems.
System modeling abilities.
Programming in C, C++, Python, Verilog, and SystemVerilog.
Strong written and oral communication skills.

Questions fréquentes

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Source : ats:workday

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Published 7 hours ago

Expires 1 month from now

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marvell

Cordoba

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