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Analog Modeling & Testing Engineer Intern

marvell · Cordoba

New
Junior 🇬🇧 English
SPICE Python Verilog

Job description

About the role

Marvell’s Central Engineering Team in Córdoba is looking for an analog mixed‑signal design intern to support the development of analog IP products. You will assist in IC design, layout, silicon evaluation and characterization while gaining hands‑on experience with advanced analog training.

Key responsibilities

  • Support IC design through design, layout, and silicon evaluation.
  • Model analog circuits in SystemVerilog and verify against SPICE simulations.
  • Develop Python scripts and firmware for testing analog circuits.
  • Run co‑simulation between digital and analog designs.
  • Enhance design flows to improve robustness of analog IC development.

Required profile

  • Final‑year student of a 5/5.5‑year engineering program (UTN‑FRC, UTN‑VM, UNC, IUA) or Master/PhD in Electrical Engineering in Argentina.
  • Self‑motivated, eager to learn new technologies and work within a talented team.
  • Strong analytical understanding of transistor‑level and CMOS circuit design.

Required skills

  • SystemVerilog modeling and verification.
  • SPICE circuit simulation.
  • Python programming for test automation.
  • Experience with Verilog simulations.
  • Ability to write behavioral models for analog and digital circuits (a plus).

What we offer

  • Competitive compensation and comprehensive benefits.
  • Collaborative, transparent, and inclusive work environment.
  • Opportunities for professional growth and development.

Questions fréquentes

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Source : ats:workday

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Published 1 hour ago

Expires 1 month from now

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marvell

Cordoba