Senior Staff Engineer, Physical Design

About the role

This in‑office position in Cordoba, Argentina focuses on the physical design and methodology for Marvell’s next‑generation high‑performance processor chips. You will work on leading‑edge CMOS processes targeting server, 5G/6G, and networking applications.

Key responsibilities

• Collaborate with Digital, RTL, and Analog teams to ensure timely design convergence and integration.
• Implement and support multi‑voltage designs through place‑and‑route, static timing analysis, and physical verification using industry‑standard EDA tools.
• Drive design closure by working closely with RTL teams.
• Provide technical direction, coaching, and mentoring to junior engineers.
• Develop automation scripts in Shell, Python, and TCL to improve productivity.

Required profile

• Bachelor’s, Master’s or PhD in Electrical or Computer Engineering or a related field.
• 8+ years of progressive experience in back‑end physical design and verification.
• Proven expertise in full‑chip and sub‑hierarchy integration and tape‑out of large digital designs.
• Strong understanding of RTL‑to‑GDS flows, digital logic, and computer architecture.
• Excellent communication skills and ability to work in a collaborative team environment.

Required skills

• Cadence Innovus (or comparable place‑and‑route tool).
• EDA tools for static timing and physical verification.
• Shell scripting, Python, TCL, and Perl.
• RTL‑to‑GDS flow management.
• Multi‑voltage and low‑power design techniques.
• Verilog.
• Digital logic and computer architecture knowledge.

What we offer

• Competitive compensation and a comprehensive benefits package.