Junior Analog Layout Engineer

About the role

Marvell is seeking a Junior Analog Layout Engineer to join its Central Engineering group. You will translate analog circuit schematics into physical layouts using industry‑standard CAD tools, supporting global product teams across automotive, storage, security and networking.

Key responsibilities

• Receive analog IC schematics from designers and create detailed layout layers.
• Perform verification and sign‑off using Cadence Virtuoso, iterating designs with the circuit designer.
• Collaborate with cross‑functional teams in Argentina, Singapore, the United States and Europe through regular meetings.
• Document progress, present issues and solutions to project and layout teams.
• Contribute to projects lasting from a few months up to 18 months, adapting to shifting priorities.

Required profile

• Bachelor’s or Master’s degree in Electrical Engineering.
• Strong understanding of fundamental electrical concepts.
• Coursework or project experience in analog design or layout.

Required skills

• Proficiency with CAD tools for microelectronic layout.
• Experience using Cadence Virtuoso for verification and debugging.
• Knowledge of analog layout techniques.