Digital IC Design & Verification Engineer

About the role

Join Marvell's Framer team to design and verify VLSI architecture for high‑speed communication chips. You will work on implementing digital blocks for coherent transceivers, integrating IP, and supporting firmware development.

Key responsibilities

• Design and code RTL for Framer blocks and PCIe‑related digital logic.
• Create and maintain SystemVerilog testbenches and automated regression suites.
• Run simulations, analyze waveforms, and report issues.
• Support senior engineers with documentation, micro‑architecture details, and design reviews.
• Participate in functional verification, protocol checks, and basic debugging.
• Collaborate with design, firmware, and physical design teams to ensure system integration.

Required profile

• Engineering degree in electronics, computer engineering, or related field.
• Proficiency in C, C++ and Python.
• Basic knowledge of Verilog, SystemVerilog or VHDL.
• Understanding of object‑oriented programming concepts.
• Familiarity with communication standards such as IEEE or Ethernet is a plus.
• Strong English communication skills, both written and verbal.

Required skills

• C
• C++
• Python
• Verilog
• SystemVerilog
• VHDL (basic)
• UVM (basic knowledge)
• PCIe protocol knowledge

What we offer

• Competitive compensation and comprehensive benefits.
• Collaborative, transparent, and inclusive work environment.
• Opportunities for professional growth and learning in cutting‑edge semiconductor technology.