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Digital IC Design Engineer (Junior)

Marvell Technology · Córdoba

Junior 🇬🇧 English
Verilog SystemVerilog RTL design Digital logic design Synchronous design principles Hardware state machines ModelSim VCS Questa UVM Design for Test VLSI FPGA Linux

Descripcion del puesto

About the role

Marvell is looking for a Junior Digital IC Design Engineer to join its Connectivity Business Unit. You will work on high‑speed digital circuits for 800G+ connectivity applications, focusing on design‑for‑test hardware and techniques within a cutting‑edge transceiver environment.

Key responsibilities

  • Implement test architecture and logic across blocks of high‑speed coherent transceivers.
  • Develop RTL code using Verilog/SystemVerilog and create testbenches for simulation and verification.
  • Debug design issues, ensure functional correctness, and produce block‑level specifications and documentation.
  • Support synthesis, timing closure, and physical implementation teams by providing constraints and timely issue resolution.
  • Participate in design reviews and contribute to architectural decisions.

Required profile

  • Engineering degree in electronics, computer engineering, communications or a related technical field.
  • Proficiency in RTL design with Verilog and/or SystemVerilog.
  • Strong understanding of digital logic, synchronous design principles, and hardware state machines.
  • Experience with simulation and debugging tools such as ModelSim, VCS or Questa.
  • Ability to collaborate with verification, physical design and other cross‑functional teams.
  • Fluent spoken and written English for communication with global teams.

Required skills

  • Verilog
  • SystemVerilog
  • RTL design
  • Digital logic design
  • Synchronous design principles
  • Hardware state machines
  • ModelSim
  • VCS
  • Questa
  • UVM (basic knowledge)
  • Design‑for‑Test techniques
  • VLSI
  • FPGA
  • Linux environment

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Publicado hace 2 meses

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